Figure 2 from Development of a Through-Silicon Via (TSV) Process Module for Multi-project Wafer SiGe BiCMOS and Silicon Interposer | Semantic Scholar
Strained Si, SiGe, and Ge on-insulator: review of wafer bonding fabrication techniques - ScienceDirect
Silicon Germanium (SiGe) Substrates in Stock - University Wafer
Schematic cross section of SiGe HBT on wafer-bonded SOI with buried... | Download Scientific Diagram
Schematic cross section of SiGe HBT on wafer-bonded SOI with buried... | Download Scientific Diagram
Figure 5 from Development of a Through-Silicon Via (TSV) Process Module for Multi-project Wafer SiGe BiCMOS and Silicon Interposer | Semantic Scholar
Philips Semiconductors - Newsroom; Backgrounders;
Nanomaterials | Free Full-Text | High-Performance P- and N-Type SiGe/Si Strained Super-Lattice FinFET and CMOS Inverter: Comparison of Si and SiGe FinFET
Strain engineering in functional materials: AIP Advances: Vol 9, No 3
Schematic cross-section of the UHV/CVD SiGe HBT. | Download Scientific Diagram
Tensile-strained Ge/SiGe quantum-well photodetectors on silicon substrates with extended infrared response
Advanced Epi - Group IV Epitaxy Services - Germanium
Towards large size substrates for III-V co-integration made by direct wafer bonding on Si: APL Materials: Vol 2, No 8
Scheme of the cross-section of a planarized BiCMOS chip ready for the... | Download Scientific Diagram
Sketch of the heterogeneous integration between SiGe/Si MQWs wafer and... | Download Scientific Diagram
Silicon Germanium (SiGe) Substrates in Stock - University Wafer
Epitaxial growth of SiGe films by annealing Al–Ge alloyed pastes on Si substrate | Scientific Reports
Applied Sciences | Free Full-Text | Experimental Analyses on Multiscale Structural and Mechanical Properties of ε-Si/GeSi/C-Si Materials
Wafer-Scale Integration of Graphene-Based Photonic Devices | ACS Nano
A Trip Down TSMC Memory Lane – Part 2 | TechInsights
properties of ssoi wafers
